
                .

                - 1.
                        - 2.
                 - 3.
                        - 4.
                           - 5.
    SDRAM               - 6.
                - 7.
  ,                    - 8.
     - 9.
 ,  , ...???                    - 10.





     1.    .

        .
        Celeron 448 (4x112) 
 .   ,   .
  (     ....),
    ....  ....
   1   .    :
---   -   ??     '1  
'    !      .
,   266MHz    .....  
  UpGrade .
   ..,  ,    ( 
     ).      
 ..... ,    ...   ...
 ... !!
   1.      .
   2.      XT    .
,  -  - RAMEXAM.
   10 ,    cache 2 level - 25 -
 (   ''  ).
          -
   cache 2 level,    cache 1 level  
. ,   cache 1 level,   
    ....      
 .
      ....
    (sourcer, hiew)    .  -
      10 !   !
  .
     ,  ,  -   DRAM (SDRAM)
.      MR BIOS -  , 
 .    ,   PnP (   W95)
  . AWARD.    BIOS    .
  SETUP  MR BIOS    SIMM.
   . ,       
.  -        
.    ''   3D action games.
   '' ,     .
  chipset ,  -     ( ASUS P2B ).



     2.  .

     :
   1.       .
   2. ''    MMX .
   3.   .
 1  1 ,   2  3  .  2 
      chip' .  
     (  ).
   ,   RAM,    8-  :
A,B,A,B.  B =  A.
           -
   0/1/0/1 ...,      
   RAM   chipset.
       ,   RAM  -
  A,B,A,B;   .      
: A,B,A,B,A+const,B-const,A+const,B-const,A+2const... const -
    .
   const = -7,      -
      -  1/0/1/0  
.
           RAM,   -
 -    .    -  
 100 .        .  -



     3.   .

  -       , 
-      ....
,  ,     ASUS P2B    
.
  ..,       .,
      (    
   1/0,     0/1 .....).
   ,       
 .



      4.  .

   -f   ( fast )     -    .
   -d  ( default )   -   50   2  .
   -s   ( slow )     -  200   5  .
   -l   ( long )     - 2000   5  .
   -v  ( very long ).- 4000   25  .

   -1  -  1   -    ( -).
   -2  -  2   -    .
   -5  -  5   -      
               .
   -0  -  50   -     .
                RAM.    .
    -1...-0    -  .

   -p  -   .   - . .
   -b  -     ( ).
   -e  -     / -     ,
                -  (  -    BIOS -
               ? )
   -m  -       MMX .
   >>ERRORS.TXT  -     ...  ,   .
   -h  - .




     5. .

a.  DOS (  1Mb )  , ..   , 
   ' .
b. -    INTEL    
  MMX (   MMX   67h).
    ,     
  32   ...  ... '   4   
    RAM (, -).
     ,   cache 1 level
.     4   .
  ...  'MMX read'  :
  1. 'MMX read'     .
  2.   cache 2 level,  'MMX read'    cache.
        -   ...  ... cache -  .
  3.   cache 2 level 'MMX read benchmark'  
         cache,  .




     6.    SDRAM. ( )

         t0  t1  t2  t3  t4  t5  t6  t7  t8  t9  t10
 clock - -- -- -- -- -- -- -- -- -- -- --
        L-- L-- L-- L-- L-- L-- L-- L-- L-- L-- L-- L
 RAS   - -------------------------------------------
        L--
 CAS   --------- ------ ------ ------ ------ ---
                L--     L--     L--     L--     L--
       ---------------------------S-D-R-A-M---  >   chipset
                     tx
  :
   RAS to CAS delay -  t2-t0
   CAS Latency      -  tx-t2
   RAS precharge    -   
      
RAS to CAS delay  RAS to CAS delay.
     (   
   2  ).



     7.   .
     :

=======================================
       Extended   memory  =  64Mb      
      50 cycles of memory checking.    
       2 repeat READ-operation.        
L=========  Constant pattern  ==========-
Address=036F2488   load=DE32B54B   pattern=DE32B54B   parity=........
Address=036F4008   load=DE32B50B   pattern=DE32B54B   parity=......4.
Address=036F5008   load=DE32B50B   pattern=DE32B54B   parity=......4.
Address=036F6008   load=DE32B50B   pattern=DE32B54B   parity=......4.
Address=036FA708   load=DE32B50B   pattern=DE32B54B   parity=......4.
Address=036E52E0   load=FFFFFFFF   pattern=FFFFFFFF   parity=........

    -   5     1.
   CAS_latency   ....

Address=036F2488   load=DE32B54B   pattern=DE32B54B   parity=........
     -    ,
    cache  !
   RAM   -     cache 1
level    CPU.

           
 .     . , , 
  .
      ,    
     .
    !   ,      
 40 ( HDD  ).        35.  
     ...      - 
, ..  - ,      Unreal.



     8.  ,  .

 :
                .....
Write_All_RAM:
                mov	ds:[edi],eax
     	        mov	ds:[edi+4],eax
     	        mov	ds:[edi+8],ebx
     	        mov	ds:[edi+12],ebx
     	        mov	ds:[edi+16],edx
     	        mov	ds:[edi+20],edx
     	        mov	ds:[edi+24],ebp
     	        mov 	ds:[edi+28],ebp

 	        add	edi,32

                add     eax,esi
                add     ebx,esi
                add     edx,esi
                add     ebp,esi

                cmp     edi,ecx
                jb      Write_All_RAM
                .....

 MMX :
                .....
MMX_read:
                movq    mm0,qword ptr ds:[di]
                movq    mm1,qword ptr ds:[di+8]
                movq    mm2,qword ptr ds:[di+16]
                movq    mm3,qword ptr ds:[di+24]

                add	edi,32
                cmp     edi,ecx
                jb      MMX_read
                .....
 :
                .....
Compare_RAM:
                cmp	eax,ds:[EDI]
	        jne	Bad_1_Word
      	        cmp	eax,ds:[EDI+4]
	        jne	Bad_2_Word
     	        cmp	ebx,ds:[EDI+8]
	        jne	Bad_3_Word
      	        cmp	ebx,ds:[EDI+12]
	        jne	Bad_4_Word
      	        cmp	edx,ds:[EDI+16]
	        jne	Bad_5_Word
     	        cmp	edx,ds:[EDI+20]
	        jne	Bad_6_Word
      	        cmp	ebp,ds:[EDI+24]
	        jne	Bad_7_Word
      	        cmp	ebp,ds:[EDI+28]
	        jne	Bad_8_Word

Next_Compare:   add	edi,32

                add     eax,esi
                add     ebx,esi
                add     edx,esi
                add     ebp,esi

                cmp     edi,ecx
                jb      Compare_RAM
                .....

      FPU,  ,
  (cmpxchg..)  ..
CMP  ,   .

  ....      
 .



     9.    .

- ASUS P2B, Celeron 266 ( 448 = 4 * 112 )
- SDRAM - 2 * 32Mb = 64Mb  -  Fujitsu, chips 81117822E-100FN
-     ( ) ~3 .
- benchmark: 202Mb/720Mb/320Mb  (. )
- -  CAS Latency = 3 - 192Mb/695Mb/316Mb -  !

    K5-75  P75  P208     K6-200    K6-208    Celeron448
   Write      35    62    105       80        87         202
  MMX read     -     -  167/256*  163/227*  167/253*     720
   Read       63    47     88       93        94         320

* - cache 2 level = disable/enable
* -    ,  -  cache 2 level.

         - socket 7
   .... (       AGP  
 +.)

-     A,B,A,B  A,A,A,A  
      100  (27040/250),
     .

-    +38 mainboard (+58  CPU)   
27070    .

-     ,    ,
     - 
 .

-      26,35,44... .
 -        200 .

-   : 'default' ~ 36 , 'slow' ~ 4 ,
'long' - 40  , 'very long' - 6 .
  MMX      25-30.

-      
   10% ,   .

-    RAM  - 200Mb/sec, ..  
    MMX    .

-    RAM  600Mb/sec, ..  
   .



     10. ,  , ...???

          - http://www.freeware.ru
      - http://ixbt.stack.net

     , , .....
  -          ,
   ;-).

p.s.
   -    ... - 
    .

serj_m@hotmail.com

Serj.
